Sunday, March 19, 2006

Any Replacement for Altera EPCS Devices?


I know there are already many websites which claim that Altera Serial Configuration Devices, a.k.a. EPCS devices, can be replaced by some lower cost devices. This post is just to give you more confidence on the availability of other cheaper configuration solution for Cyclone series and Stratix II FPGAs.

Altera introduced EPCS devices at the same time the Cyclone device is announced. Traditionally, the cost of the configuration devices (EPC family) for the Altera FPGAs are quite expensive, compared with the cost of the FPGAs. Most of the FPGA users want almost zero cost for the FPGA configuration solution since the configuration device is mostly a combination of a simple controller and a non-volatile memory that stores the configuration bitstream. Therefore, when the so-called "cheapest FPGA family", Cyclone FPGA was launched by Altera, Altera also took the initiative to provide a cost efficient configuration solution for the Cyclone FPGA. The traditional configuration solution for Altera FPGAs prior to Cyclone FPGA requires a simple controller to load the configuration bitstream from a non-volatile memory and write to the FPGAs during configuration. This kind of configuration methodolgy is called passive configuration. The passive configuration can be either in serial form or parallel form, depending on the available configuration modes of the selected FPGAs. Active Serial configuration was first available in Altera Cyclone FPGA family. During the active serial configuration, the FPGA will write out the Read Bytes instruction to the EPCS device and then continuously read the data out from the serial flash from the address 0x000000 until the FPGA is configured. The smart approach greatly reduces the configuration cost by putting the simple controller in the FPGA itself. That means, the configuration cost is only left with the non-volatile memory only. As a result, the SPI serial flash is chosen to store the configuration bitstream as it is low cost, low pin count and easy to control from the FPGA.


Nonetheless, engineers are usually very calculative people. The EPCS price list, if you check from the Digikey website, looks attractive at the first glance due to the sudden price drop on the configuration solution for an Altera FPGA. As time goes by, engineers realize that the EPCS device is none but a very standard serial flash. And, a standard serial flash should cost much lower than an EPCS device with the same memory capacity. I grab some data from the Digikey website. For an example, an EPCS1 device costs USD$3.50 but a ST’s M25P10-A serial flash from ST costs as low as USD$1.10, which is a huge difference! Imagine if you are just targeting the Altera smallest Cyclone device with slowest speed grade, EP1C3T100C8 (costs USD$10.70 quoted by Digikey), you will be paying too much for the configuration solution with EPCS1. Don’t you agree? M25P10 can equally do the job well at lower cost. Why not? Don’t bother whether they are exactly the same die or not. Both devices commands and timing specifications meet the active configuration controller (embedded inside Cyclone FPGA) requirement. Even the Quartus II programmer tool recognizes ST’s M25P10-A, M25P40, M25P16 and M25P64, as EPCS1, EPCS4, EPCS16 and EPCS64, accordingly. Perhaps there are still other cheaper alternative than ST’s M25P family.

In fact, the serial flash can do even more other than the configuration solution. You can use it to store the general-purpose data! You will always find out that the serial flash always has more than enough to store the configuration bitstream, especially if you turn on the configuration bitstream compression in the Quartus II software tool. So, don’t waste the rest of the memory in the serial flash, furthermore, they are non-volatile memory, which is often useful to keep some serial numbers, identification numbers, calibration data, tracking numbers, etc. And, the microprocessor program data! For an example, you can save the NIOS II ELF file in the serial flash and boot from the serial flash after power-up. For that reason, you may need to choose a serial flash with a bigger density, to store not only the configuration data, as well as the microprocessor program data. That way, you don’t need to source another flash device to store the microprocessor data. How big the serial flash required is determined by the code size of your program. Sometimes, instead of using an EPCS4 device just to store the configuration bitstream, I will choose an EPCS16 replacement (USD$ 16.25 from Digikey), ST’s M25P16 (USD$ 4.56 from Digikey) to be my Cyclone, Cyclone II or Straitx II FPGA configuration solution as well as the storage for my NIOS II ELF file, not to mention some general-purpose user data.

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
Disclaimer: The information on this post is for informational purpose only. The author reserves the right not to be responsible for the topicality, correctness, completeness or quality of the information provided. Liability claims regarding damage caused by the use of any information provided, including any kind of information which is incomplete or incorrect, will therefore be rejected.

Saturday, March 04, 2006

What is Bandwidth?

Introduction to Bandwidth
According to Meriam-Webster Dictionary, the definition of bandwidth is
1: a range within a band of wavelengths, frequencies, or energies; especially : a range of radio frequencies which is occupied by a modulated carrier wave, which is assigned to a service, or over which a device can operate
2: the capacity for data transfer of an electronic communications system (graphics consume more bandwidth than text does); especially : the maximum data transfer rate of such a system

Anyway, the engineers always do not take the definition from the dictionary as a simple answer. So, what is bandwidth anyway? Engineers always mention about “bandwidth” when dealing with oscilloscope, probe, trace, connectors, etc. Sometimes, due to budget limitation, engineers complain about not enough bandwidth or limited bandwidth. So what is all this fuss about bandwidth?

Ever think about why the sampling oscilloscope with 50GS/s (GS/s: sampling per second) costs so much higher than the digital phosphor oscilloscope with just 1GS/s? The reason is very simple: the scope with 50GS/s has much higher bandwidth than the scope with 1GS/s. The bandwidth of the scope with 1GS/s is about 100MHz whereas the bandwidth of the scope with 50GS/s is 50GHz. May be examples can give you a better idea about bandwidth.

Below is a scope shot of a 50MHz square wave (generated by a FPGA device) captured on a sampling oscilloscope with 50GS/s.

Below is a scope shot of the 50MHz square wave from the similar source as above, captured on a digital phosphor oscilloscope with 1GS/s.


As you can see, it doesn't seem to have much difference from both the captured scope shots of a 50MHz square wave, but sometimes looks can be deceiving. Let's check out the rising time of this 50MHz square wave. Again, both scope shots (zoomed in from the previous shots) are shown here for your reference.
Square wave rising-edge captured on a 50GS/s scope:


Square wave rising-edge captured on a 1GS/s scope:


So, as you can see, the rising-edge of the 50MHz square wave actually is within ps (pico-second)range, but the 1GS/s scope tells you that the rising-edge takes almost 1ns (nano-second). Anyway, this is still acceptable for 50MHz square wave.

Let's now measure 250MHz square wave (also generated by FPGA) on both the 50GS/s scope and 1GS/S scope.
This is measured on the 50GS/s scope:


This is measured on the 1GS/s scope:


Needless to say, the 250MHz square wave looks more like a trapezoidal wave on the 1GS/s scope.

How does 500MHz square wave look like on both scope? Here are the scope shots.
500MHz square wave measured on 50GS/s scope:


500MHz square wave measured on 1GS/s scope and it no longer looks like square wave:


Finally, this is how the 1GHz square wave looks like on the 50GS/s and 1GS/s scope, respectively. As you can see, the 1GHz not only looks more like a sinusoidal wave from the 1GS/s scope, its amplitude is also much smaller.



I believe all the above scope shots can prove to you the importance of bandwidth of a oscilloscope. Not only that, the bandwidth of a probe can also affect the results seen on the oscilloscope. The scope shot below is captured using a 4GHz FET probe and a SMA cable on a 7GHz storage scope. The signal measured is a 3.125Gbps signal generated by a Stratix GX FPGA device.

So, in conclusion, what are the considerations for the bandwidth? There are several rules of thumb when considering the bandwidth of an instrument.
1. Minimum bandwidth should be at least 5 times of the expected measured highest frequency.
2. If you are interested to measure the rise time, the minimum bandwidth should be 0.45/(rise time). Otherwise, the rise time that you have measured is inaccurate. For an example, look at the rise time of the 50MHz square wave captured above from different scopes.
3. Or, the minimum bandwidth is up to the 9th harmonic of the highest frequency, of course, higher the better. If you are not sure of what is 9th harmonic, then you can read my previous posts, History and Beauty of Sine Function and Building Square Wave from Fourier Series. That is the reason I said that the Fourier Series plays an important role in today's world and this is just one of the thousands examples or applications that have a close relationship with Fourier.